diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTSchip.h linux-2.6.13-eike/drivers/scsi/cpqfcTSchip.h --- linux-2.6.13/drivers/scsi/cpqfcTSchip.h 2005-09-13 14:56:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTSchip.h 2005-09-13 14:56:21.000000000 +0200 @@ -20,7 +20,6 @@ */ #ifndef CPQFCTSCHIP_H #define CPQFCTSCHIP_H -#ifndef TACHYON_CHIP_INC // FC-PH (Physical) specification levels for Login payloads // NOTE: These are NOT strictly complied with by any FC vendors @@ -32,21 +31,6 @@ #define TACHLITE_TS_RX_SIZE 1024 // max inbound frame size // "I" prefix is for Include -#define IVENDID 0x00 // word -#define IDEVID 0x02 -#define ITLCFGCMD 0x04 -#define IMEMBASE 0x18 // Tachyon -#define ITLMEMBASE 0x1C // Tachlite -#define IIOBASEL 0x10 // Tachyon I/O base address, lower 256 bytes -#define IIOBASEU 0x14 // Tachyon I/O base address, upper 256 bytes -#define ITLIOBASEL 0x14 // TachLite I/O base address, lower 256 bytes -#define ITLIOBASEU 0x18 // TachLite I/O base address, upper 256 bytes -#define ITLRAMBASE 0x20 // TL on-board RAM start -#define ISROMBASE 0x24 -#define IROMBASE 0x30 - -#define ICFGCMD 0x04 // PCI config - PCI config access (word) -#define ICFGSTAT 0x06 // PCI status (R - word) #define IRCTR_WCTR 0x1F2 // ROM control / pre-fetch wait counter #define IPCIMCTR 0x1F3 // PCI master control register #define IINTPEND 0x1FD // Interrupt pending (I/O Upper - Tachyon & TL) @@ -231,8 +215,4 @@ // (no 0xe) #define OLD_PORT 0xf - - -#define TACHYON_CHIP_INC -#endif #endif /* CPQFCTSCHIP_H */ diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTScontrol.c linux-2.6.13-eike/drivers/scsi/cpqfcTScontrol.c --- linux-2.6.13/drivers/scsi/cpqfcTScontrol.c 2005-09-13 14:56:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTScontrol.c 2005-09-13 16:20:51.000000000 +0200 @@ -49,8 +49,12 @@ //#define IMQ_DEBUG 1 -static void fcParseLinkStatusCounters(TACHYON * fcChip); -static void CpqTsGetSFQEntry(TACHYON *, ULONG, TachFCHDR_GCMND*, int); +static void fcParseLinkStatusCounters(struct cpqfc_tachyon *); +static void CpqTsGetSFQEntry(struct cpqfc_tachyon *, ULONG, TachFCHDR_GCMND*, int); +static int CpqTsCreateTachLiteQues(CPQFCHBA *, int); +static int CpqTsDestroyTachLiteQues(CPQFCHBA *, int); +static int CpqTsLaserControl(void* __iomem, int); +static int CpqTsReadWriteWWN(PTACHYON, int); static void cpqfc_free_dma_consistent(CPQFCHBA *cpqfcHBAdata) @@ -73,9 +77,8 @@ cpqfc_free_dma_consistent(CPQFCHBA *cpqf // in non-symbolic (i.e. memory dump) debugging // opcode defines placement of Queues (e.g. local/external RAM) -int CpqTsCreateTachLiteQues( void* pHBA, int opcode) +int CpqTsCreateTachLiteQues(CPQFCHBA *cpqfcHBAdata, int opcode) { - CPQFCHBA *cpqfcHBAdata = (CPQFCHBA*)pHBA; PTACHYON fcChip = &cpqfcHBAdata->fcChip; int iStatus=0; @@ -334,9 +337,8 @@ int CpqTsCreateTachLiteQues( void* pHBA, // 1st - reset tachyon ('SOFT' reset) // others - future -int CpqTsResetTachLite(void *pHBA, int type) +int CpqTsResetTachLite(struct cpqfc_hba *cpqfcHBAdata, int type) { - CPQFCHBA *cpqfcHBAdata = (CPQFCHBA*)pHBA; PTACHYON fcChip = &cpqfcHBAdata->fcChip; ULONG ulBuff, i; int ret_status=0; // def. success @@ -381,7 +383,7 @@ int CpqTsResetTachLite(void *pHBA, int t // circuit" which keeps laser ON for a brief // period after it is turned off ( < 1s) - fcChip->LaserControl(fcChip->Registers.ReMapMemBase, 0); + CpqTsLaserControl(fcChip->Registers.ReMapMemBase, 0); // soft reset timing constraints require: // 1. set RST to 1 @@ -426,7 +428,7 @@ int CpqTsResetTachLite(void *pHBA, int t } // 'addrBase' is IOBaseU for both TachLite and (older) Tachyon -int CpqTsLaserControl( void* addrBase, int opcode ) +int CpqTsLaserControl(void* __iomem addrBase, int opcode) { ULONG dwBuff; @@ -445,14 +447,12 @@ int CpqTsLaserControl( void* addrBase, i // external loopback (GBIC - no FC loop) // no loopback: L_PORT, external cable from GBIC required -int CpqTsInitializeFrameManager( void *pChip, int opcode) +int CpqTsInitializeFrameManager(struct cpqfc_tachyon *fcChip, int opcode) { - PTACHYON fcChip; int iStatus; ULONG wwnLo, wwnHi; // for readback verification ENTER("InitializeFrameManager"); - fcChip = (PTACHYON)pChip; if( !fcChip->Registers.ReMapMemBase ) // undefined controller? return -1; @@ -522,7 +522,7 @@ int CpqTsInitializeFrameManager( void *p if( !fcChip->Options.intLoopback && !fcChip->Options.extLoopback ) // (also need LASER for real LOOP) - fcChip->LaserControl( fcChip->Registers.ReMapMemBase, 1); // turn on LASER + CpqTsLaserControl( fcChip->Registers.ReMapMemBase, 1); // turn on LASER writel( fcChip->Registers.FMconfig.value, fcChip->Registers.FMconfig.address); @@ -648,9 +648,8 @@ static void SetTachTOV( CPQFCHBA* cpqfcH // 2. all IMQ messages should be processed before writing the // IMQ consumer index. -int CpqTsProcessIMQEntry(void *host) +int CpqTsProcessIMQEntry(struct Scsi_Host *HostAdapter) { - struct Scsi_Host *HostAdapter = (struct Scsi_Host *)host; CPQFCHBA *cpqfcHBAdata = (CPQFCHBA *)HostAdapter->hostdata; PTACHYON fcChip = &cpqfcHBAdata->fcChip; FC_EXCHANGES *Exchanges = fcChip->Exchanges; @@ -875,9 +874,7 @@ int CpqTsProcessIMQEntry(void *host) // or XRDY frames if ((fchs.d_id & 0xFF000000) == 0x06000000) { /* CMND */ // someone sent us a SCSI command - -// fcPutScsiQue(cpqfcHBAdata, -// SFQ_UNASSISTED_FCP, ulFibreFrame); + printk(KERN_WARNING "%s: received SCSI command\n", DEV_NAME); } else if (((fchs.d_id & 0xFF000000) == 0x07000000) || /* RSP (status) */ (fchs.d_id & 0xFF000000) == 0x05000000) { /* XRDY */ ULONG x_ID; @@ -1416,11 +1413,9 @@ int CpqTsProcessIMQEntry(void *host) fchs.reserved = x_ID; /* copy for later reference */ // if this was a TWE, we have to send satus response - if( Exchanges->fcExchange[ x_ID].type == SCSI_TWE ) - { -// fcPutScsiQue(cpqfcHBAdata, -// NEED_FCP_RSP, ulFibreFrame); // (ulFibreFrame not used here) - } + if (Exchanges->fcExchange[x_ID].type == SCSI_TWE) { + printk(KERN_WARNING "%s: received SCSI command\n", DEV_NAME); + } } } else // ERROR CONDITION! bogus x_ID in completion message @@ -1499,33 +1494,25 @@ int CpqTsProcessIMQEntry(void *host) // -1 on fatal error // 0 on success -int CpqTsInitializeTachLite( void *pHBA, int opcode1, int opcode2) +int CpqTsInitializeTachLite(CPQFCHBA *cpqfcHBAdata, int opcode1, int opcode2) { - CPQFCHBA *cpqfcHBAdata = (CPQFCHBA*)pHBA; PTACHYON fcChip = &cpqfcHBAdata->fcChip; ULONG ulBuff; UCHAR bBuff; int iStatus=-1; // assume failure - ENTER("InitializeTachLite"); - - // verify board's base address (sanity check) - - if( !fcChip->Registers.ReMapMemBase) // NULL address for card? - return -1; // FATAL error! + ENTER(__FUNCTION__); switch( opcode1 ) { case 1: // restore hardware to power-on (hard) restart - - iStatus = fcChip->ResetTachyon( - cpqfcHBAdata, opcode2); // laser off, reset hardware + /* laser off, reset hardware */ + iStatus = CpqTsResetTachLite(cpqfcHBAdata, opcode2); // de-allocate aligned buffers /* TBD // reset FC link Q (producer and consumer = 0) fcLinkQReset(cpqfcHBAdata); - */ if( iStatus ) @@ -1623,9 +1610,8 @@ int CpqTsInitializeTachLite( void *pHBA, // it's probably best to free memory in opposite order as it was allocated. // Order of allocation: see other function -int CpqTsDestroyTachLiteQues( void *pHBA, int opcode) +int CpqTsDestroyTachLiteQues(CPQFCHBA *cpqfcHBAdata, int opcode) { - CPQFCHBA *cpqfcHBAdata = (CPQFCHBA*)pHBA; PTACHYON fcChip = &cpqfcHBAdata->fcChip; USHORT i, iStatus=0; void* vPtr; // mem Align manager sets this to the freed address on success @@ -1736,7 +1722,7 @@ int CpqTsDestroyTachLiteQues( void *pHBA * enough for the complete message (max 2k). */ static void -CpqTsGetSFQEntry(PTACHYON fcChip, ULONG producerNdx, TachFCHDR_GCMND *dest, +CpqTsGetSFQEntry(struct cpqfc_tachyon *fcChip, ULONG producerNdx, TachFCHDR_GCMND *dest, int UpdateChip) { int total_bytes = 0; @@ -1775,9 +1761,8 @@ CpqTsGetSFQEntry(PTACHYON fcChip, ULONG // we routinely RESUME by clearing these bits, but only if the loop is up // to avoid ERROR IDLE messages forever. -void CpqTsUnFreezeTachlite( void *pChip, int type ) +void CpqTsUnFreezeTachlite(PTACHYON fcChip, int type) { - PTACHYON fcChip = (PTACHYON)pChip; fcChip->Registers.TYcontrol.value = readl(fcChip->Registers.TYcontrol.address); @@ -1820,9 +1805,8 @@ void CpqTsUnFreezeTachlite( void *pChip, // This freeze function will result in FCP & ERQ FROZEN completion // messages (per argument "type"). -void CpqTsFreezeTachlite( void *pChip, int type ) +void CpqTsFreezeTachlite(PTACHYON fcChip, int type) { - PTACHYON fcChip = (PTACHYON)pChip; fcChip->Registers.TYcontrol.value = readl(fcChip->Registers.TYcontrol.address); @@ -1843,7 +1827,7 @@ void CpqTsFreezeTachlite( void *pChip, i // function breaks out each 8-bit field and adds the value to the existing // sum. (s/w counters cleared independently) -void fcParseLinkStatusCounters(PTACHYON fcChip) +void fcParseLinkStatusCounters(struct cpqfc_tachyon *fcChip) { UCHAR bBuff; ULONG ulBuff; @@ -1928,9 +1912,8 @@ void cpqfcTSClearLinkStatusCounters(PTAC // be correctly loaded by Tachyon silicon. In the login payload, bytes // must be correctly swapped for Big Endian format. -int CpqTsReadWriteWWN( PVOID pChip, int Read) +int CpqTsReadWriteWWN(PTACHYON fcChip, int Read) { - PTACHYON fcChip = (PTACHYON)pChip; #define NVRAM_SIZE 512 unsigned short i, count = NVRAM_SIZE; UCHAR nvRam[NVRAM_SIZE], WWNbuf[8]; @@ -2001,12 +1984,10 @@ int CpqTsReadWriteWWN( PVOID pChip, int // adapter does not use the NM24C03 chip, so this function only works on // Compaq's adapters. -int CpqTsReadWriteNVRAM( PVOID pChip, PVOID buf, int Read) +int CpqTsReadWriteNVRAM(PTACHYON fcChip, void *buf, int Read) { - PTACHYON fcChip = (PTACHYON)pChip; #define NVRAM_SIZE 512 ULONG ulBuff; - UCHAR *ucPtr = buf; // cast caller's void ptr to UCHAR array int iStatus=-1; // assume failure @@ -2016,7 +1997,7 @@ int CpqTsReadWriteNVRAM( PVOID pChip, PV fcChip->Registers.TYstatus.address, fcChip->Registers.TYcontrol.address, 256, // bytes to write - ucPtr ); // source ptr + buf); // source ptr if( ulBuff ) iStatus = 0; // success diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTS.h linux-2.6.13-eike/drivers/scsi/cpqfcTS.h --- linux-2.6.13/drivers/scsi/cpqfcTS.h 2005-09-13 14:56:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTS.h 2005-09-13 15:35:20.000000000 +0200 @@ -6,7 +6,6 @@ extern int cpqfcTS_detect(Scsi_Host_Template *); extern int cpqfcTS_release(struct Scsi_Host *); extern const char * cpqfcTS_info(struct Scsi_Host *); -extern int cpqfcTS_proc_info(struct Scsi_Host *, char *, char **, off_t, int, int); extern int cpqfcTS_queuecommand(Scsi_Cmnd *, void (* done)(Scsi_Cmnd *)); extern int cpqfcTS_abort(Scsi_Cmnd *); extern int cpqfcTS_eh_abort(Scsi_Cmnd *Cmnd); @@ -15,4 +14,4 @@ extern int cpqfcTS_biosparam(struct scsi sector_t, int[]); extern int cpqfcTS_ioctl( Scsi_Device *ScsiDev, int Cmnd, void *arg); -#endif /* CPQFCTS_H */ +#endif /* CPQFCTS_H */ diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTSi2c.c linux-2.6.13-eike/drivers/scsi/cpqfcTSi2c.c --- linux-2.6.13/drivers/scsi/cpqfcTSi2c.c 2005-09-13 14:56:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTSi2c.c 2005-09-13 16:23:12.000000000 +0200 @@ -77,7 +77,6 @@ static void tl_i2c_tx_byte( void* GPIOou #define SLAVE_READ_ADDRESS 0xA1 #define SLAVE_WRITE_ADDRESS 0xA0 -static void i2c_delay(ULONG mstime); static void tl_i2c_clock_pulse( UCHAR , void* GPIOout); static UCHAR tl_read_i2c_data( void* ); @@ -173,7 +172,7 @@ static unsigned short tl_i2c_tx_start( v // To START, bring data low while clock high tl_write_i2c_reg( GPIOout, SET_CLOCK_HI | SET_DATA_LO ); - i2c_delay(0); + udelay(5); return TRUE; // TX start successful } @@ -198,7 +197,7 @@ static unsigned short tl_i2c_tx_stop( vo tl_write_i2c_reg( GPIOout, SET_DATA_HI | SET_CLOCK_HI ); // Give the data line time to float high - i2c_delay(0); + udelay(5); // If slave is driving data line low, there's a problem; retry if ( tl_read_i2c_data(GPIOin) & SENSE_DATA_HI ) @@ -346,7 +345,7 @@ static void tl_i2c_clock_pulse( UCHAR va // clear the clock bit tl_clr_clock( GPIOout ); - i2c_delay(0); + udelay(5); // read the port to preserve non-I2C bits ret_val = readl( GPIOout ); @@ -360,7 +359,7 @@ static void tl_i2c_clock_pulse( UCHAR va ret_val |= SET_CLOCK_LO; // the clock writel( ret_val, GPIOout ); - i2c_delay(0); + udelay(5); //set clock bit tl_set_clock( GPIOout); @@ -444,29 +443,3 @@ int cpqfcTS_GetNVRAM_data( UCHAR *wwnbuf } // end while return iReturn; } - -// define a short 5 micro sec delay, and longer (ms) delay - -static void i2c_delay(ULONG mstime) -{ - ULONG i; - -// NOTE: we only expect to use these delays when reading -// our adapter's NVRAM, which happens only during adapter reset. -// Delay technique from "Linux Device Drivers", A. Rubini -// (1st Ed.) pg 137. - -// printk(" delay %lx ", mstime); - if( mstime ) // ms delay? - { - // delay technique - for( i=0; i < mstime; i++) - udelay(1000); // 1ms per loop - - } - else // 5 micro sec delay - - udelay( 5 ); // micro secs - -// printk("done\n"); -} diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTSinit.c linux-2.6.13-eike/drivers/scsi/cpqfcTSinit.c --- linux-2.6.13/drivers/scsi/cpqfcTSinit.c 2005-09-13 14:56:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTSinit.c 2005-09-13 16:43:44.000000000 +0200 @@ -53,17 +53,18 @@ #include #include "cpqfcTSchip.h" #include "cpqfcTSstructs.h" -#include "cpqfcTStrigger.h" #include "cpqfcTS.h" -/* Embedded module documentation macros - see module.h */ +#define MODVER "2.5.4" MODULE_AUTHOR("Compaq Computer Corporation"); -MODULE_DESCRIPTION("Driver for Compaq 64-bit/66Mhz PCI Fibre Channel HBA v. 2.5.4"); +MODULE_DESCRIPTION("Driver for Compaq 64-bit/66Mhz PCI Fibre Channel HBA v. " MODVER); MODULE_LICENSE("GPL"); int cpqfcTS_TargetDeviceReset( Scsi_Device *ScsiDev, unsigned int reset_flags); static void cpqfc_tasklet_func(unsigned long); +static irqreturn_t cpqfcTS_intr_handler(int, void *, struct pt_regs *); +static void cpqfcTSDecodeGBICtype(struct cpqfc_tachyon *, char *); // This struct was originally defined in // /usr/src/linux/include/linux/proc_fs.h @@ -185,19 +186,6 @@ static void Cpqfc_initHBAdata(CPQFCHBA * cpqfcHBAdata->fcChip.highest_FCPH_ver = FC_PH3; cpqfcHBAdata->fcChip.lowest_FCPH_ver = FC_PH43; - // set function points for this controller / adapter - cpqfcHBAdata->fcChip.ResetTachyon = CpqTsResetTachLite; - cpqfcHBAdata->fcChip.FreezeTachyon = CpqTsFreezeTachlite; - cpqfcHBAdata->fcChip.UnFreezeTachyon = CpqTsUnFreezeTachlite; - cpqfcHBAdata->fcChip.CreateTachyonQues = CpqTsCreateTachLiteQues; - cpqfcHBAdata->fcChip.DestroyTachyonQues = CpqTsDestroyTachLiteQues; - cpqfcHBAdata->fcChip.InitializeTachyon = CpqTsInitializeTachLite; - cpqfcHBAdata->fcChip.LaserControl = CpqTsLaserControl; - cpqfcHBAdata->fcChip.ProcessIMQEntry = CpqTsProcessIMQEntry; - cpqfcHBAdata->fcChip.InitializeFrameManager = CpqTsInitializeFrameManager; - cpqfcHBAdata->fcChip.ReadWriteWWN = CpqTsReadWriteWWN; - cpqfcHBAdata->fcChip.ReadWriteNVRAM = CpqTsReadWriteNVRAM; - if (cpqfc_alloc_private_data_pool(cpqfcHBAdata) != 0) { printk(KERN_WARNING "cpqfc: unable to allocate pool for passthru ioctls. " @@ -380,7 +368,7 @@ int cpqfcTS_detect(Scsi_Host_Template *S // now initialize our hardware... - if (cpqfcHBAdata->fcChip.InitializeTachyon( cpqfcHBAdata, 1,1)) { + if (CpqTsInitializeTachLite(cpqfcHBAdata, 1,1)) { printk(KERN_WARNING "cpqfc: initialization of HBA hardware failed.\n"); goto err_release_region_L; } @@ -721,7 +709,7 @@ int cpqfcTS_release(struct Scsi_Host *Ho // disable the hardware... DEBUG_PCI( printk(" disable hardware, destroy queues, free mem\n")); - cpqfcHBAdata->fcChip.ResetTachyon( cpqfcHBAdata, CLEAR_FCPORTS); + CpqTsResetTachLite(cpqfcHBAdata, CLEAR_FCPORTS); kthread_stop(cpqfcHBAdata->worker_thread); @@ -743,43 +731,24 @@ int cpqfcTS_release(struct Scsi_Host *Ho return 0; } - -const char * cpqfcTS_info(struct Scsi_Host *HostAdapter) +const char * +cpqfcTS_info(struct Scsi_Host *HostAdapter) { - static char buf[300]; - CPQFCHBA *cpqfcHBA; - int BusSpeed, BusWidth; + static char buf[256]; + CPQFCHBA *cpqfcHBA = (CPQFCHBA *)HostAdapter->hostdata; - // get the pointer to our Scsi layer HBA buffer - cpqfcHBA = (CPQFCHBA *)HostAdapter->hostdata; + snprintf(buf, sizeof(buf), "%s: WWN %08X%08X\n, IRQ %d, IObaseL 0x%x, " + "MEMBASE 0x%x\nFCP-SCSI Driver v" MODVER, + cpqfcHBA->fcChip.Name, + cpqfcHBA->fcChip.Registers.wwn_hi, + cpqfcHBA->fcChip.Registers.wwn_lo, + HostAdapter->irq, + cpqfcHBA->fcChip.Registers.IOBaseL, + cpqfcHBA->fcChip.Registers.MemBase); - BusWidth = (cpqfcHBA->fcChip.Registers.PCIMCTR &0x4) > 0 ? - 64 : 32; + cpqfcTSDecodeGBICtype(&cpqfcHBA->fcChip, buf); - if( cpqfcHBA->fcChip.Registers.TYconfig.value & 0x80000000) - BusSpeed = 66; - else - BusSpeed = 33; - - sprintf(buf, -"%s: WWN %08X%08X\n on PCI bus %d device 0x%02x irq %d IObaseL 0x%x, MEMBASE 0x%x\nPCI bus width %d bits, bus speed %d MHz\nFCP-SCSI Driver v%d.%d.%d", - cpqfcHBA->fcChip.Name, - cpqfcHBA->fcChip.Registers.wwn_hi, - cpqfcHBA->fcChip.Registers.wwn_lo, - cpqfcHBA->PciDev->bus->number, - cpqfcHBA->PciDev->device, - HostAdapter->irq, - cpqfcHBA->fcChip.Registers.IOBaseL, - cpqfcHBA->fcChip.Registers.MemBase, - BusWidth, - BusSpeed, - VER_MAJOR, VER_MINOR, VER_SUBMINOR -); - - - cpqfcTSDecodeGBICtype( &cpqfcHBA->fcChip, &buf[ strlen(buf)]); - cpqfcTSGetLPSM( &cpqfcHBA->fcChip, &buf[ strlen(buf)]); - return buf; + return buf; } // @@ -842,8 +811,9 @@ static int copy_info(struct info_str *in // Routine to get data for /proc RAM filesystem // -int cpqfcTS_proc_info (struct Scsi_Host *host, char *buffer, char **start, off_t offset, int length, - int inout) +static int +cpqfcTS_proc_info (struct Scsi_Host *host, char *buffer, char **start, + off_t offset, int length, int inout) { struct scsi_cmnd *DumCmnd; struct scsi_device *ScsiDev; @@ -851,8 +821,7 @@ int cpqfcTS_proc_info (struct Scsi_Host struct info_str info; CPQFCHBA *cpqfcHBA; PTACHYON fcChip; - PFC_LOGGEDIN_PORT pLoggedInPort; - char buf[81]; + char buf[64]; if (inout) return -EINVAL; @@ -867,9 +836,8 @@ int cpqfcTS_proc_info (struct Scsi_Host info.bufoffset = offset; info.filpos = 0; info.buffillen = 0; - copy_info(&info, "Driver version = %d.%d.%d", VER_MAJOR, VER_MINOR, VER_SUBMINOR); - cpqfcTSDecodeGBICtype( &cpqfcHBA->fcChip, &buf[0]); - cpqfcTSGetLPSM( &cpqfcHBA->fcChip, &buf[ strlen(buf)]); + copy_info(&info, "Driver version = " MODVER); + cpqfcTSDecodeGBICtype(&cpqfcHBA->fcChip, buf); copy_info(&info, "%s\n", buf); #define DISPLAY_WWN_INFO @@ -886,6 +854,8 @@ int cpqfcTS_proc_info (struct Scsi_Host for ( Chan=0; Chan <= host->max_channel; Chan++) { DumCmnd->device->channel = Chan; for (Targ=0; Targ <= host->max_id; Targ++) { + PFC_LOGGEDIN_PORT pLoggedInPort; + DumCmnd->device->id = Targ; if ((pLoggedInPort = fcFindLoggedInPort( fcChip, DumCmnd, // search Scsi Nexus @@ -1344,7 +1314,6 @@ int cpqfcTS_queuecommand(Scsi_Cmnd *Cmnd { if( cpqfcHBAdata->BoardLock ) { - TriggerHBA( fcChip->Registers.ReMapMemBase, 0); printk(" @bl! %d, xID %Xh@ ", current->pid, ExchangeID); } @@ -1656,9 +1625,7 @@ cpqfc_tasklet_func(unsigned long data) LEAVE(__FUNCTION__); } -irqreturn_t cpqfcTS_intr_handler( int irq, - void *dev_id, - struct pt_regs *regs) +irqreturn_t cpqfcTS_intr_handler(int irq, void *dev_id, struct pt_regs *regs) { unsigned long flags; @@ -1718,10 +1685,8 @@ irqreturn_t cpqfcTS_intr_handler( int ir return IRQ_RETVAL(handled); } - - - -int cpqfcTSDecodeGBICtype( PTACHYON fcChip, char cErrorString[]) +void +cpqfcTSDecodeGBICtype(struct cpqfc_tachyon *tc, char *buf) { // Verify GBIC type (if any) and correct Tachyon Port State Machine // (GBIC) module definition is: @@ -1731,126 +1696,54 @@ int cpqfcTSDecodeGBICtype( PTACHYON fcCh // Hard code the bit states to detect Copper, // Long wave (single mode), Short wave (multi-mode), and absent GBIC - ULONG ulBuff; - - sprintf( cErrorString, "\nGBIC detected: "); + strcat(buf, "\nGBIC detected: "); - ulBuff = fcChip->Registers.TYstatus.value & 0x13; - switch( ulBuff ) - { + switch(tc->Registers.TYstatus.value & 0x13) { case 0x13: // GPIO4, GPIO1, GPIO0 = 111; no GBIC! - sprintf( &cErrorString[ strlen( cErrorString)], - "NONE! "); - return FALSE; + strcat(buf, "none "); + break; case 0x11: // Copper GBIC detected - sprintf( &cErrorString[ strlen( cErrorString)], - "Copper. "); + strcat(buf, "Copper "); break; case 0x10: // Long-wave (single mode) GBIC detected - sprintf( &cErrorString[ strlen( cErrorString)], - "Long-wave. "); + strcat(buf, "Long-wave "); break; case 0x1: // Short-wave (multi mode) GBIC detected - sprintf( &cErrorString[ strlen( cErrorString)], - "Short-wave. "); + strcat(buf, "Short-wave "); break; default: // unknown GBIC - presumably it will work (?) - sprintf( &cErrorString[ strlen( cErrorString)], - "Unknown. "); - + strcat(buf, "Unknown "); break; } // end switch GBIC detection - return TRUE; -} - - - - - - -int cpqfcTSGetLPSM( PTACHYON fcChip, char cErrorString[]) -{ // Tachyon's Frame Manager LPSM in LinkDown state? // (For non-loop port, check PSM instead.) - // return string with state and FALSE is Link Down - - int LinkUp; - - if( fcChip->Registers.FMstatus.value & 0x80 ) - LinkUp = FALSE; - else - LinkUp = TRUE; - - sprintf( &cErrorString[ strlen( cErrorString)], - " LPSM %Xh ", - (fcChip->Registers.FMstatus.value >>4) & 0xf ); - - - switch( fcChip->Registers.FMstatus.value & 0xF0) - { - // bits set in LPSM - case 0x10: - sprintf( &cErrorString[ strlen( cErrorString)], "ARB"); - break; - case 0x20: - sprintf( &cErrorString[ strlen( cErrorString)], "ARBwon"); - break; - case 0x30: - sprintf( &cErrorString[ strlen( cErrorString)], "OPEN"); - break; - case 0x40: - sprintf( &cErrorString[ strlen( cErrorString)], "OPENed"); - break; - case 0x50: - sprintf( &cErrorString[ strlen( cErrorString)], "XmitCLS"); - break; - case 0x60: - sprintf( &cErrorString[ strlen( cErrorString)], "RxCLS"); - break; - case 0x70: - sprintf( &cErrorString[ strlen( cErrorString)], "Xfer"); - break; - case 0x80: - sprintf( &cErrorString[ strlen( cErrorString)], "Init"); - break; - case 0x90: - sprintf( &cErrorString[ strlen( cErrorString)], "O-IInitFin"); - break; - case 0xa0: - sprintf( &cErrorString[ strlen( cErrorString)], "O-IProtocol"); - break; - case 0xb0: - sprintf( &cErrorString[ strlen( cErrorString)], "O-ILipRcvd"); - break; - case 0xc0: - sprintf( &cErrorString[ strlen( cErrorString)], "HostControl"); - break; - case 0xd0: - sprintf( &cErrorString[ strlen( cErrorString)], "LoopFail"); - break; - case 0xe0: - sprintf( &cErrorString[ strlen( cErrorString)], "Offline"); - break; - case 0xf0: - sprintf( &cErrorString[ strlen( cErrorString)], "OldPort"); - break; - case 0: - default: - sprintf( &cErrorString[ strlen( cErrorString)], "Monitor"); - break; - - } - - return LinkUp; + const char *lpsm_status[] = { + "Monitor", + "ARB", + "ARBwon", + "OPEN", + "OPENed", + "XmitCLS", + "RxCLS", + "Xfer", + "Init", + "O-IInitFin", + "O-IProtocol", + "O-ILipRcvd", + "HostControl", + "LoopFail", + "Offline", + "OldPort"}; + + sprintf(buf + strlen(buf), " LPSM %Xh %s", + (tc->Registers.FMstatus.value >>4) & 0xf, + lpsm_status[tc->Registers.FMstatus.value & 0xf0]); } - - - #include "linux/slab.h" // Dynamic memory allocation alignment routines diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTSstructs.h linux-2.6.13-eike/drivers/scsi/cpqfcTSstructs.h --- linux-2.6.13/drivers/scsi/cpqfcTSstructs.h 2005-09-13 14:56:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTSstructs.h 2005-09-13 15:31:44.000000000 +0200 @@ -25,16 +25,6 @@ #include #include "cpqfcTSioctl.h" -#define DbgDelay(secs) { int wait_time; printk( " DbgDelay %ds ", secs); \ - for( wait_time=jiffies + (secs*HZ); \ - time_before(jiffies, wait_time) ;) ; } - -#define CPQFCTS_DRIVER_VER(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) -// don't forget to also change MODULE_DESCRIPTION in cpqfcTSinit.c -#define VER_MAJOR 2 -#define VER_MINOR 5 -#define VER_SUBMINOR 4 - // Macros for kernel (esp. SMP) tracing using a PCI analyzer // (e.g. x86). //#define PCI_KERNEL_TRACE @@ -111,9 +101,6 @@ typedef __s32 LONG; #ifndef ULONG typedef __u32 ULONG; #endif -#ifndef PVOID -typedef void * PVOID; -#endif #ifndef USHORT typedef __u16 USHORT; #endif @@ -645,7 +632,7 @@ typedef struct UCHAR lun[CPQFCTS_MAX_LUN]; } SCSI_NEXUS; -typedef struct +typedef struct cpqfc_loggedin_port { union { @@ -691,7 +678,7 @@ typedef struct // define singly-linked list of logged-in ports // once a port_id is identified, it is remembered, // even if the port is removed indefinitely - PVOID pNextPort; // actually, type PFC_LOGGEDIN_PORT; void for Compiler + struct cpqfc_loggedin_port *pNextPort; } FC_LOGGEDIN_PORT, *PFC_LOGGEDIN_PORT; @@ -721,10 +708,9 @@ typedef struct // we will allocate this FC_EXCHANGE fcExchange[ TACH_MAX_XID ]; } FC_EXCHANGES; -typedef struct +typedef struct cpqfc_tachyon { char Name[64]; // name of controller ("HP Tachlite TL Rev2.0, 33MHz, 64bit bus") - //PVOID pAdapterDevExt; // back pointer to device object/extension ULONG ChipType; // local numeric key for Tachyon Type / Rev. ULONG status; // our Driver - logical status @@ -748,38 +734,14 @@ typedef struct TachSEST *SEST; // SCSI Exchange State Table dma_addr_t exch_dma_handle; +} *PTACHYON; + +void cpqfcTSClearLinkStatusCounters(struct cpqfc_tachyon *); - // these function pointers are for "generic" functions, which are - // replaced with Host Bus Adapter types at - // runtime. - int (*CreateTachyonQues)( void* , int); - int (*DestroyTachyonQues)( void* , int); - int (*LaserControl)(void*, int ); // e.g. On/Off - int (*ResetTachyon)(void*, int ); - void (*FreezeTachyon)(void*, int ); - void (*UnFreezeTachyon)(void*, int ); - int (*InitializeTachyon)(void*, int, int ); - int (*InitializeFrameManager)(void*, int ); - int (*ProcessIMQEntry)(void*); - int (*ReadWriteWWN)(void*, int ReadWrite); - int (*ReadWriteNVRAM)(void*, void*, int ReadWrite); - -} TACHYON, *PTACHYON; - -void cpqfcTSClearLinkStatusCounters(TACHYON * fcChip); - -int CpqTsCreateTachLiteQues( void* pHBA, int opcode); -int CpqTsDestroyTachLiteQues( void* , int); -int CpqTsInitializeTachLite( void *pHBA, int opcode1, int opcode2); - -int CpqTsProcessIMQEntry(void* pHBA); -int CpqTsResetTachLite(void *pHBA, int type); -void CpqTsFreezeTachlite(void *pHBA, int type); -void CpqTsUnFreezeTachlite(void *pHBA, int type); -int CpqTsInitializeFrameManager(void *pHBA, int); -int CpqTsLaserControl( void* addrBase, int opcode ); -int CpqTsReadWriteWWN(void*, int ReadWrite); -int CpqTsReadWriteNVRAM(void*, void* data, int ReadWrite); +int CpqTsProcessIMQEntry(struct Scsi_Host *); +void CpqTsFreezeTachlite(struct cpqfc_tachyon *, int); +void CpqTsUnFreezeTachlite(struct cpqfc_tachyon *, int); +int CpqTsInitializeFrameManager(struct cpqfc_tachyon *, int); void cpqfcTS_WorkTask( struct Scsi_Host *HostAdapter); extern int cpqfcTSWorkerThread(void *host); @@ -794,29 +756,21 @@ BOOLEAN tl_write_i2c_nvram( void* GPIOin UCHAR *buf ); // define misc functions -int cpqfcTSGetLPSM( PTACHYON fcChip, char cErrorString[]); -int cpqfcTSDecodeGBICtype( PTACHYON fcChip, char cErrorString[]); void* fcMemManager( struct pci_dev *pdev, ALIGNED_MEM *dyn_mem_pair, ULONG n_alloc, ULONG ab, ULONG ulAlignedAddress, dma_addr_t *dma_handle); -void BigEndianSwap( UCHAR *source, UCHAR *dest, USHORT cnt); - -//ULONG virt_to_phys( PVOID virtaddr ); - -// Linux interrupt handler -irqreturn_t cpqfcTS_intr_handler( int irq,void *dev_id,struct pt_regs *regs); void cpqfcTSheartbeat( unsigned long ptr ); // The biggest Q element we deal with is Aborts - we // need 4 bytes for x_ID, and a Scsi_Cmnd (~284 bytes) //#define LINKQ_ITEM_SIZE ((4+sizeof(Scsi_Cmnd)+3)/4) #define LINKQ_ITEM_SIZE (3*16) -typedef struct +struct cpqfc_linkque_item { ULONG Type; // e.g. LINKUP, SFQENTRY, PDISC, BLS_ABTS, ... ULONG ulBuff[ LINKQ_ITEM_SIZE ]; -} LINKQ_ITEM; +}; #define FC_LINKQ_DEPTH TACH_MAX_XID typedef struct @@ -824,7 +778,7 @@ typedef struct ULONG producer; ULONG consumer; // when producer equals consumer, Q empty - LINKQ_ITEM Qitem[ FC_LINKQ_DEPTH ]; + struct cpqfc_linkque_item Qitem[ FC_LINKQ_DEPTH ]; } FC_LINK_QUE, *PFC_LINK_QUE; @@ -832,21 +786,6 @@ typedef struct // User thread processes #define FC_SCSIQ_DEPTH 32 -typedef struct -{ - int Type; // e.g. SCSI - ULONG ulBuff[ 3*16 ]; -} SCSIQ_ITEM; - -typedef struct -{ - ULONG producer; - ULONG consumer; // when producer equals consumer, Q empty - - SCSIQ_ITEM Qitem[ FC_SCSIQ_DEPTH ]; - -} FC_SCSI_QUE, *PFC_SCSI_QUE; - typedef struct { /* This is tacked on to a Scsi_Request in upper_private_data for pasthrough ioctls, as a place to hold data that can't @@ -862,11 +801,11 @@ typedef struct { #define DYNAMIC_ALLOCATIONS 4 // Tachyon aligned allocations: ERQ,IMQ,SFQ,SEST // Linux space allocated per HBA (chip state, etc.) -typedef struct +typedef struct cpqfc_hba { struct Scsi_Host *HostAdapter; // back pointer to Linux Scsi struct - TACHYON fcChip; // All Tachyon registers, Queues, functions + struct cpqfc_tachyon fcChip; /* All Tachyon registers, Queues, functions */ ALIGNED_MEM dynamic_mem[DYNAMIC_ALLOCATIONS]; struct pci_dev *PciDev; @@ -902,6 +841,9 @@ typedef struct struct tasklet_struct hosttask; } CPQFCHBA; +int CpqTsInitializeTachLite(struct cpqfc_hba *, int, int); +int CpqTsResetTachLite(struct cpqfc_hba *, int type); + #define CPQ_SPINLOCK_HBA( x ) spin_lock(&x->hba_spinlock); #define CPQ_SPINUNLOCK_HBA(x) spin_unlock(&x->hba_spinlock); @@ -939,17 +881,9 @@ PFC_LOGGEDIN_PORT fcFindLoggedInPort( void cpqfcTSPutLinkQue(CPQFCHBA *, int, TachFCHDR_GCMND*, ULONG); -void fcPutScsiQue( - CPQFCHBA *cpqfcHBAdata, - int Type, - void *QueContent); - -void fcLinkQReset( - CPQFCHBA *); -void fcScsiQReset( - CPQFCHBA *); -void fcSestReset( - CPQFCHBA *); +void fcLinkQReset(CPQFCHBA *); +void fcScsiQReset(CPQFCHBA *); +void fcSestReset(CPQFCHBA *); void cpqfc_pci_unmap(struct pci_dev *pcidev, Scsi_Cmnd *cmd, diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTStrigger.c linux-2.6.13-eike/drivers/scsi/cpqfcTStrigger.c --- linux-2.6.13/drivers/scsi/cpqfcTStrigger.c 2005-09-12 18:26:21.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTStrigger.c 1970-01-01 01:00:00.000000000 +0100 @@ -1,33 +0,0 @@ -// Routine to trigger Finisar GTA analyzer. Runs of GPIO2 -// NOTE: DEBUG ONLY! Could interfere with FCMNGR/Miniport operation -// since it writes directly to the Tachyon board. This function -// developed for Compaq HBA Tachyon TS v1.2 (Rev X5 PCB) - -#include "cpqfcTStrigger.h" -#if TRIGGERABLE_HBA - -#include -#include -#include -#include -#include - -void TriggerHBA( void* IOBaseUpper, int Print) -{ - __u32 long value; - - // get initial value in hopes of not modifying any other GPIO line - IOBaseUpper += 0x188; // TachTL/TS Control reg - - value = readl( IOBaseUpper); - // set HIGH to trigger external analyzer (tested on Dolche Finisar 1Gb GTA) - // The Finisar anaylzer triggers on low-to-high TTL transition - value |= 0x01; // set bit 0 - - writel( value, IOBaseUpper); - - if( Print) - printk( " -GPIO0 set- "); -} - -#endif diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTStrigger.h linux-2.6.13-eike/drivers/scsi/cpqfcTStrigger.h --- linux-2.6.13/drivers/scsi/cpqfcTStrigger.h 2005-08-29 01:41:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTStrigger.h 1970-01-01 01:00:00.000000000 +0100 @@ -1,8 +0,0 @@ -// don't do this unless you have the right hardware! -#define TRIGGERABLE_HBA 0 -#if TRIGGERABLE_HBA -void TriggerHBA( void*, int); -#else -#define TriggerHBA(x, y) -#endif - diff -Naurp linux-2.6.13/drivers/scsi/cpqfcTSworker.c linux-2.6.13-eike/drivers/scsi/cpqfcTSworker.c --- linux-2.6.13/drivers/scsi/cpqfcTSworker.c 2005-09-13 14:56:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/cpqfcTSworker.c 2005-09-13 16:43:43.000000000 +0200 @@ -41,7 +41,6 @@ #include // struct Scsi_Host definition for T handler #include "cpqfcTSchip.h" #include "cpqfcTSstructs.h" -#include "cpqfcTStrigger.h" //#define LOGIN_DBG 1 @@ -144,6 +143,8 @@ static void IssueReportLunsCommand( CPQFCHBA* cpqfcHBAdata, TachFCHDR_GCMND* fchs); +static void BigEndianSwap(UCHAR *, UCHAR *, USHORT); + int cpqfcTSWorkerThread(void *host) { @@ -228,7 +229,7 @@ static BOOLEAN FreezeTach( CPQFCHBA *cpq if( (fcChip->Registers.TYstatus.value & 0x70000) != 0x70000) { // (need to freeze...) - fcChip->FreezeTachyon( fcChip, 2); // both ERQ and FCP assists + CpqTsFreezeTachlite(fcChip, 2); // both ERQ and FCP assists // 2. Get Tach freeze confirmation // (synchronize SEST manipulation with Freeze Completion Message) @@ -529,7 +530,7 @@ void cpqfcTS_WorkTask( struct Scsi_Host // any received SEST frame cannot be processed by the SEST. // Don't "unfreeze" unless Link is operational if( FrozeTach ) // did we just freeze it (above)? - fcChip->UnFreezeTachyon( fcChip, 2); // both ERQ and FCP assists + CpqTsUnFreezeTachlite(fcChip, 2); // both ERQ and FCP assists PCI_TRACEO( x_ID, 0xB4) @@ -636,7 +637,7 @@ void cpqfcTS_WorkTask( struct Scsi_Host printk(" *ABTS_ACC* "); // 1. Freeze TL - fcChip->FreezeTachyon( fcChip, 2); // both ERQ and FCP assists + CpqTsFreezeTachlite(fcChip, 2); // both ERQ and FCP assists memcpy( // copy the incoming ABTS frame &fchs, @@ -663,7 +664,7 @@ void cpqfcTS_WorkTask( struct Scsi_Host // as quickly as possible to allow other exchanges to other ports // to resume. Freezing Tachyon for too long may royally screw // up everything! - fcChip->UnFreezeTachyon( fcChip, 2); // both ERQ and FCP assists + CpqTsUnFreezeTachlite(fcChip, 2); // both ERQ and FCP assists // Note there is no confirmation that the chip is "unfrozen". Also, // if the Link is down when unfreeze is called, it has no effect. @@ -777,7 +778,6 @@ cpqfcTSPutLinkQue(CPQFCHBA *cpqfcHBAdata fcChip->fcStats.lnkQueFull++; printk("*LinkQ Full!*"); - TriggerHBA( fcChip->Registers.ReMapMemBase, 1); /* { int i; @@ -847,88 +847,15 @@ cpqfcTSPutLinkQue(CPQFCHBA *cpqfcHBAdata // reset device ext FC link Q void cpqfcTSLinkQReset( CPQFCHBA *cpqfcHBAdata) - -{ - PFC_LINK_QUE fcLQ = cpqfcHBAdata->fcLQ; - fcLQ->producer = 0; - fcLQ->consumer = 0; -} - -// When Tachyon gets an unassisted FCP-SCSI frame, post here so -// an arbitrary context thread (e.g. IOCTL loopback test function) -// can process it. - -// (NOTE: Not revised for Linux) -// This Q works like Tachyon's que - the producer points to the next -// (unused) entry. -void cpqfcTSPutScsiQue( CPQFCHBA *cpqfcHBAdata, - int Type, - void *QueContent) { -// CPQFCHBA *cpqfcHBAdata = (CPQFCHBA *)HostAdapter->hostdata; -// PTACHYON fcChip = &cpqfcHBAdata->fcChip; - -// ULONG ndx; - -// ULONG *pExchangeID; -// LONG ExchangeID; - -/* - KeAcquireSpinLockAtDpcLevel( &pDevExt->fcScsiQueLock); - ndx = pDevExt->fcScsiQue.producer + 1; // test for Que full - - if( ndx >= FC_SCSIQ_DEPTH ) // rollover test - ndx = 0; - - if( ndx == pDevExt->fcScsiQue.consumer ) // QUE full test - { - // QUE was full! lost LK command (fatal to logic) - fcChip->fcStats.ScsiQueFull++; -#ifdef DBG - printk( "fcPutScsiQue - FULL!\n"); -#endif - - } - else // QUE next element - { - pDevExt->fcScsiQue.Qitem[pDevExt->fcScsiQue.producer].Type = Type; - - if( Type == FCP_RSP ) - { - // this TL inbound message type means that a TL SEST exchange has - // copied an FCP response frame into a buffer pointed to by the SEST - // entry. That buffer is allocated in the SEST structure at ->RspHDR. - // Copy the RspHDR for use by the Que handler. - pExchangeID = (ULONG *)QueContent; - - memcpy( - pDevExt->fcScsiQue.Qitem[pDevExt->fcScsiQue.producer].ulBuff, - &fcChip->SEST->RspHDR[ *pExchangeID ], - sizeof(pDevExt->fcScsiQue.Qitem[0].ulBuff)); // (any element for size) - - } - else - { - memcpy( - pDevExt->fcScsiQue.Qitem[pDevExt->fcScsiQue.producer].ulBuff, - QueContent, - sizeof(pDevExt->fcScsiQue.Qitem[pDevExt->fcScsiQue.producer].ulBuff)); - } - - pDevExt->fcScsiQue.producer = ndx; // increment Que - - - KeSetEvent( &pDevExt->TYIBscsi, // signal any waiting thread - 0, // no priority boost - FALSE ); // no waiting later for this event - } - KeReleaseSpinLockFromDpcLevel( &pDevExt->fcScsiQueLock); -*/ + PFC_LINK_QUE fcLQ = cpqfcHBAdata->fcLQ; + fcLQ->producer = 0; + fcLQ->consumer = 0; } -static void ProcessELS_Request( CPQFCHBA*,TachFCHDR_GCMND*); -static void ProcessELS_Reply( CPQFCHBA*,TachFCHDR_GCMND*); -static void ProcessFCS_Reply( CPQFCHBA*,TachFCHDR_GCMND*); +static void ProcessELS_Request(CPQFCHBA*, TachFCHDR_GCMND*); +static void ProcessELS_Reply(CPQFCHBA*, TachFCHDR_GCMND*); +static void ProcessFCS_Reply(CPQFCHBA*, TachFCHDR_GCMND*); void cpqfcTSImplicitLogout( CPQFCHBA* cpqfcHBAdata, PFC_LOGGEDIN_PORT pFcPort) @@ -1971,11 +1898,6 @@ static void AnalyzeIncomingFrame( ENTER("AnalyzeIncomingFrame"); - switch( fcLQ->Qitem[QNdx].Type) // FCP or Unknown - { - - case SFQ_UNKNOWN: // unknown frame (e.g. LIP position frame, NOP, etc.) - // ********* FC-4 Device Data/ Fibre Channel Service ************* if( ((fchs->d_id &0xF0000000) == 0) // R_CTL (upper nibble) 0x0? && @@ -2178,14 +2100,6 @@ static void AnalyzeIncomingFrame( } } // end of ABTS check } // end of Basic Link Service Request - break; - - default: - printk("AnalyzeIncomingFrame: unknown type: %Xh(%d)\n", - fcLQ->Qitem[QNdx].Type, - fcLQ->Qitem[QNdx].Type); - break; - } } // Function for Port Discovery necessary after every FC @@ -2772,11 +2686,11 @@ static void IssueReportLunsCommand( } } else // Xchange setup failed... - printk(" cpqfcTSBuildExchange failed: %Xh\n", ulStatus ); + printk(" cpqfcTSBuildExchange failed: 0x%Xh\n", ulStatus ); } else // like, we just got a PRLI ACC, and now the port is gone? { - printk(" can't send ReportLuns - no login for port_id %Xh\n", + printk(" can't send ReportLuns - no login for port_id 0x%Xh\n", fchs->s_id & 0xFFFFFF); } @@ -3220,10 +3134,8 @@ static void RevalidateSEST( struct Scsi_ } } - if( TachFroze) - { - fcChip->UnFreezeTachyon( fcChip, 2); // both ERQ and FCP assists - } + if (TachFroze) + CpqTsUnFreezeTachlite(fcChip, 2); // both ERQ and FCP assists } // Complete an Linux Cmnds that we Queued because diff -Naurp linux-2.6.13/drivers/scsi/Makefile linux-2.6.13-eike/drivers/scsi/Makefile --- linux-2.6.13/drivers/scsi/Makefile 2005-08-29 01:41:01.000000000 +0200 +++ linux-2.6.13-eike/drivers/scsi/Makefile 2005-09-13 16:31:21.000000000 +0200 @@ -158,7 +158,7 @@ CFLAGS_ncr53c8xx.o := $(ncr53c8xx-flags- zalon7xx-objs := zalon.o ncr53c8xx.o NCR_Q720_mod-objs := NCR_Q720.o ncr53c8xx.o cpqfc-objs := cpqfcTSinit.o cpqfcTScontrol.o cpqfcTSi2c.o \ - cpqfcTSworker.o cpqfcTStrigger.o + cpqfcTSworker.o libata-objs := libata-core.o libata-scsi.o # Files generated that shall be removed upon make clean